CDMA Trainer (VPL-CDMAL)

Description

VPL-CDMAL trainer provides a basic understanding of the concepts behind CDMA, and various issues that need to be considered in the design of a DSSS system. These include the usage of pseudorandom (PN) codes and digital modulations BPSK. It has digital modulation & demodulation along with direct sequence spread spectrum (DSSS) generation and decoding, data signals, zero random bit signal generation.

SPECIFICATIONS

  • ♦ It uses the VLSI Technology
  • ♦ On Board Pseudo-Noise (PN) Code generator Bits : 16 bits.
  • ♦ On Board Digital Data generator : 1 Nos.
    • – Word Length : 8 Bits.
    • – Bit Clock Frequency : 240 KHz.
    • – Data Format : NRZ.
  • ♦ Modulation Carrier Frequency of 1.44 MHz.
  • ♦ Spreading Code Mixer and Unipolar to Bipolar Converter section.
  • ♦ Modulator Type : Coherent Binary PSK Modulator.
  • ♦ Demodulator Type : Coherent Detector.
  • ♦ Low pass Filter cutoff Frequency : 240 KHz.
  • ♦ Code Dispreading : Using EX-NOR gate.
  • ♦ Power supply requirement : 230V AC, 50 Hz.